The design and test of modern electronic devices, such as embedded processors (EP) and systems-on-a-chip (SoC) is a complex process involving many stages. For example, many systems, such as mobile devices, networking products, and modems require new embedded processors (EP). These EPs can either be general purpose, such as microcontrollers (μC) and digital signal processors (DSP), or application specific, using application specific instruction set processors (ASIP). Finding a best-in-class solution involves exploring the tradeoff between a general design that is highly flexible and a specific design that is highly optimized. This design exploration phase is conventionally very time consuming; however, given the importance of short product development cycle times, reducing the time required for the design exploration phase is highly significant. The development process of new EPs, SoCs, etc., is separated into several development phases, such as design exploration, software tools design, system integration, and design implementation. In order to facilitate the design process, it is useful have simulators that can simulate hardware and software of the device being designed.
Among the various elements of the overall design are busses, whose architecture must be explored, tested, and verified. The design and test of the bus is a very complex process, as the design of the bus must be explored and tested along with the other components of the EP or SoC. In order to explore and test a bus architecture, it is useful have a bus simulator. A bus simulator may be implemented by manually writing a simulator for the bus. The bus simulator may be used to simulate the bus, along with other elements of the architecture being developed. The simulation allows architecture exploration of the bus design, along with other components of the architecture. The bus simulation also allows testing and verification.
As previously mentioned, simulation may be used to aid in software exploration and testing. For example, a SoC contains a processor for which software may be written. By simulating the SoC (including any busses thereon), software can be written and tested for the SoC while the SoC is still being designed and tested. Thus, the software can be written and tested before the SoC is manufactured.